Asian Journal of Mathematics and Computer Research

Statistical Intelligence for Detecting AI Model Aging and Concept Drift in Adaptive Cybersecurity Systems

Sat, 05 Sep 2026 00:00:00 +0000

Machine-learning intrusion detectors are typically validated once at deployment and then trusted indefinitely. This is unsafe because the traffic distribution used for training differs from what deployed detectors encounter, with the gap widening as adversaries introduce unseen techniques. We formalise this degradation as model aging and develop a statistical decision framework that identifies, without ground-truth labels, when a cybersecurity model becomes unreliable and when retraining is economically justified.

The framework combines the Population Stability Index, Kullback–Leibler and Jensen–Shannon divergences, Wasserstein-1 distance, the two-sample Kolmogorov–Smirnov statistic, and sequential ADWIN, Page–Hinkley, and CUSUM procedures with two bounded state variables: the Model Aging Index (MAI), which accumulates null-calibrated distributional stress under exponential forgetting, and the Cybersecurity Drift Index (CDI), which incorporates the asymmetric costs of missed intrusions and false alerts. We prove that both indices are bounded, monotone, and Lipschitz, while their stationary exceedance probability admits an explicit bound for certified false-alarm control. The underlying marginal transport statistic also lower-bounds the joint Wasserstein radius, establishing alarm soundness.

Retraining is formulated as an optimal-stopping problem, yielding a control-limit policy analogous to an inventory replenishment threshold. Experiments on NSL-KDD introduce 17 genuinely novel attack types across 100 batches, five drift regimes, and seven architectures. Novel-family drift reduces attack recall from 0.99 to 0.57–0.66. The CDI controller cuts expected cost by 44.3% versus no retraining and 17.3% versus periodic retraining, while closing 79% of the oracle gap. Notably, periodic retraining can be harmful under adversarial drift.

On Depth of an Ideal on Artinian Modules and Applications

Carlos Henrique Tognon — Tue, 15 Sep 2026 00:00:00 +0000

Let (R,m) be a commutative Noetherian local ring, let M be an Artinian ZD-module, and let S be a Serre subcategory of the category of R-modules satisfying condition Cm. This study examines S-sequences and the associated notion of S-depth in the Artinian setting. Under the stated hypotheses, it is shown that, whenever m contains a maximal S-sequence on M, all maximal S-sequences in m have the same length. This common length is characterised through the least index at which the relevant Ext-module or local cohomology module does not belong to S.

The behaviour of S-depth is also considered in short exact sequences of Artinian ZD-modules, yielding inequalities that relate the corresponding depth values of the constituent modules. A further connection is developed between depth and Bass numbers through localisation and Ext-based descriptions.

The theoretical discussion is supplemented by examples intended to illustrate the influence of the chosen Serre subcategory on S-regularity, the existence of maximal S-sequences, and the computation of S-depth. Overall, the work presents a homological framework for studying generalised depth invariants in Artinian modules and clarifies how Serre-subcategory conditions interact with local cohomology, Ext-functors, exact sequences, and Bass-number formulations. The findings are formulated as structural results and provide a basis for further examination of generalised depth beyond the finitely generated setting.

Several special cases follow from the theorem, including results for quasi-\(\delta\)-power increasing sequences, | \(\bar{N}\), pn|k summability, and |B, pn|k summability under appropriate choices of parameters. Thus, the theorem provides a unified formulation for related absolute summability factor results within the stated hypotheses. No additional assumptions are introduced beyond those specified in the theorem, and the derived consequences are presented only as formal reductions of the main result. This maintains a close connection between the generalised theorem and the earlier summability factor results considered in the manuscript.

An Application of Absolute Matrix Summability to Infinite Series

Hikmet Seyhan Özarslan — Tue, 15 Sep 2026 00:00:00 +0000

This paper investigates sufficient conditions for absolute matrix summability factors of an infinite series. Starting from a known theorem on absolute Riesz summability factors, the study extends the result to the more general \(\varphi\)-|B; \(\delta\)|k summability framework, where B = (\(b,\eta,\omega\)) is a positive normal matrix. The development uses an almost increasing sequence (\(X\eta\)) together with conditions imposed on the matrix entries, the factor sequence (\(\xi\eta\)), the sequence (\(Z\eta\)) of (C, 1) means associated with (\(\eta{d\eta}\)), and the parameters k and \(\delta\). Two lower semimatrices generated by B are introduced to express the relevant sequence-to-sequence and series-to-series transformations. Under the stated hypotheses, the main theorem establishes that the factored series \(\sum{d_\eta\xi_\eta}\) is \(\varphi\)-|B; \(\delta\)|k summable for k ≥ 1 and 0 ≤ \(\delta\) < 1/k. The proof applies Abel’s transformation and decomposes the transformed expression into four components. Each component is then estimated using the matrix assumptions, properties of almost increasing sequences, and Holder’s inequality. The resulting bounds establish the required convergence without introducing assumptions beyond those stated in the theorem. The argument therefore connects the matrix conditions directly with the summability conclusion. Appropriate choices of \(\delta\), \(\varphi\)\(\eta\), and the matrix entries reduce the theorem to previously known absolute matrix and absolute Riesz summability results, showing that the established result provides a common framework for these special cases.

Graph Embeddings on Surfaces: A Classical Review of Topological Graph Theory

Ghadeer Khudhair Obayes, Karrar Khudhair Obayes — Fri, 11 Sep 2026 00:00:00 +0000

Topological graph theory studies graphs in relation to the surfaces on which they can be drawn. This review presents the main classical ideas of the field in a clear and connected framework. It begins with graph embeddings, Euler’s formula, and the basic principles of planar graphs. It then discusses important classical results, including the theorems of Kuratowski, Whitney, Mac Lane, and Wagner, and explains their role in understanding planarity and graph structure. The review also introduces graph embeddings on more general surfaces and examines key concepts such as genus, rotation systems, dual graphs, and surface colouring. Further topics include maximum genus, genus distributions, excluded minors, and algorithms for deciding whether a graph can be embedded on a fixed surface. Particular attention is given to the relationships among these concepts. Euler-type arguments provide useful numerical restrictions, while subdivisions and graph minors give structural characterisations of embeddability. Rotation systems offer a combinatorial way to describe embeddings, whereas genus-related parameters measure different aspects of their topological complexity. Overall, the review provides an accessible account of the classical foundations of topological graph theory and shows how its major results form a unified framework for studying graphs on surfaces. The historical development of the Heawood map-colouring programme and its relation to complete-graph embeddings is treated explicitly, including the Klein bottle exception and the sphere as the Four Colour Theorem case. Recent work is used to show how classical Kuratowski-type and bounded-genus questions remain active. The final synthesis separates established results from continuing directions in obstruction enumeration, representativity, embedding distributions, and near-planar graph drawing.

FPGA-based Control Devices for Real-time Systems: A Critical Review of Design Trends, Challenges and Research Priorities

Naqaa Luqman Mohammed — Mon, 28 Sep 2026 00:00:00 +0000

Field-programmable gate arrays (FPGAs) have moved from peripheral glue logic to the computational core of demanding real-time control devices in power conversion, electrical drives, instrumentation, robotics and scientific facilities. The device class has also changed: contemporary parts combine programmable fabric with hardened processors, memory interfaces and communication blocks, so that the controller is now a heterogeneous system rather than a homogeneous array of look-up tables. This review critically evaluates the literature on FPGA-based control devices for real-time systems, covering architectural evolution, design-entry methodologies, control-algorithm realisation, timing determinism, dynamic reconfiguration, embedded learning-based functions, dependability, security and validation practice. Peer-reviewed journal literature published between 2007 and 21 July 2026 was identified through Crossref, CORE, the Directory of Open Access Journals, OpenAIRE and Europe PMC, supplemented by backward and forward citation searching, with every retained record verified against the digital object identifier registry. The synthesis indicates that the strongest evidence concerns algorithm-level acceleration: parallel hardware realisation reliably shortens the computational interval of model predictive, sliding-mode and observer-based control laws, enabling control strategies that were previously infeasible at short sampling periods. Evidence is substantially weaker for three classes of claim that appear frequently: that FPGA-based controllers are inherently more energy efficient than processor-based alternatives, that reported latency figures constitute real-time guarantees, and that dynamic partial reconfiguration is practical in deployed safety-relevant control loops. Comparative studies rarely equalise optimisation effort across platforms, timing evidence is usually observational rather than analytical, and dependability and security are treated as separate literatures that seldom inform control-device design. Priorities include standardised reporting for control-oriented hardware evaluation, analytical timing models for heterogeneous programmable platforms, and integrated treatment of reconfiguration, fault tolerance and trust within a single design methodology.