A 3.5 GHz LOW-NOISE AMPLIFIER IN 0.18 μm CMOS FOR WiMAX APPLICATIONS

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Published: 2016-08-18

Page: 28-34


ANKUR SINGH BIST *

SVU, Gajraula, UP, India.

SAURABH PARGAEIN

Graphic Era Hill University, Uttrakhand, India

*Author to whom correspondence should be addressed.


Abstract

This paper presents low power CMOS RF front-end LNA architecture for 3.5 GHz using current reused technique with inductive source degeneration topology. The simulation of LNA architecture has been done using TSMC 0.18 μm CMOS. From the simulation results, the fully integrated LNA exhibits a gain of 14.62 dB and a noise figure of 3 dB at 3.5 GHz. The value of supply voltage is 1.6 V. The design process is simulated using Advance Design System (ADS).

Keywords: Low noise amplifier, noise figure, gain


How to Cite

BIST, A. S., & PARGAEIN, S. (2016). A 3.5 GHz LOW-NOISE AMPLIFIER IN 0.18 μm CMOS FOR WiMAX APPLICATIONS. Journal of Applied Physical Science International, 7(1), 28–34. Retrieved from https://ikprress.org/index.php/JAPSI/article/view/3061

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